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cpu-o3: O3 CPU inter-stage unblock signal causes 1-cycle bubble due to propagation delay#3191

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cpu-o3: O3 CPU inter-stage unblock signal causes 1-cycle bubble due to propagation delay#3191
zhongchengyong wants to merge 1 commit into
gem5:developfrom
zhongchengyong:o3_pip

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@zhongchengyong
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@zhongchengyong zhongchengyong commented May 21, 2026

Fixes #3190

When a downstream stage (decode/rename/IEW) blocks the upstream stage, it previously only sent the unblock signal after its skid buffer was completely drained. Due to signal propagation delay (e.g., decodeToFetchDelay), this caused a 1-cycle bubble before the upstream stage could resume sending instructions.

Fix: send unblock early when skidBuffer.size() <= stageDelay * stageWidth, i.e., when the remaining entries can be consumed during the signal propagation time. The stage only transitions to Running state when the skid buffer is truly empty, maintaining correctness.

Applied uniformly to decode->fetch, rename->decode, and IEW->rename paths. Remove stale assertions that assumed unblock is only received once.

When a downstream stage (decode/rename/IEW) blocks the upstream stage,
it previously only sent the unblock signal after its skid buffer was
completely drained. Due to signal propagation delay (e.g., decodeToFetchDelay),
this caused a 1-cycle bubble before the upstream stage could resume sending
instructions.

Fix: send unblock early when skidBuffer.size() <= stageDelay * stageWidth,
i.e., when the remaining entries can be consumed during the signal propagation
time. The stage only transitions to Running state when the skid buffer is
truly empty, maintaining correctness.

Applied uniformly to decode->fetch, rename->decode, and IEW->rename paths.
Remove stale assertions that assumed unblock is only received once.
@erin-le
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erin-le commented Jun 4, 2026

@zhongchengyong: Hello, could you investigate the CI test failures on this PR when you get a chance? Thank you!

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BUG: O3 CPU inter-stage unblock signal causes 1-cycle bubble due to propagation delay

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